1. Field of the Invention
The invention relates to a hard disc drive, more specifically, it relates to a magneto-resistance head amplifier which is used mainly as a read amplifier for driving a head(hereafter, an MR head) comprising a magneto-resistance (MR) effect element. The MR head amplifier of the present invention has a simple construction to switch from a writing mode to a reading mode in a short time, where a bias point of a loop amplifier used for the MR head amplifier can be prevented from moving.
2. Description of the Prior Art
FIG. 10 shows a conventional MR head amplifier. The MR head amplifier is usually used for reading signals out of a disc and another circuit is used for writing signals. The above reading circuit and writing circuit are used alternately. The writing circuit writes data in the disc by flowing a current through an inductor such as a thin film head. Since the writing circuit is adjacent to the MR head, a writing current generated by the write-head during writing data flows into the MR element constituting MR head as noise.
As a result, the noise induced to the MR element flows into a transistor of the MR head amplifier. The current further flows through a load resistor of the transistor and it moves the bias point of an input point of the loop amplifier constituting a closed feedback loop. When the bias point is moved, the closed loop tries to return the bias point to the original level at a moment when the MR head amplifier switches from a write-state to a read-state, then, a sag is generated in an output of the amplifier. As a result, it is not possible to read the data signal until after a certain time when sag decreases if the MR head amplifier switches from the write-state to the read-state. In order to solve this problem, changing of a bias potential is compensated for by using a loop amplifier and a switch as shown in FIG. 10.
In FIG. 10, the MR head amplifier comprises an MR element 1, a transistor 2, resistors 3, 4, a constant current source 5, a loop amplifier 6, a capacitor 9, a switch 10, and a signal amplifier 12. While reading (READ) the data signal, a closed loop for supplying the bias current through the MR element is provided. This feedback circuit feeds back to adjust an output current I.sub.0 of the loop amplifier 6 so that a voltage drop by a current Ir flowing through the resistor 4 is equal to a voltage drop by a current I flowing through the MR element and the resistor 3. In other words, the loop amplifier 6 operates by a differential voltage between the voltage drop of the resistor 3 and the voltage drop of the resistor 4.
On the assumption that a resistance of the resistor 3 is R1, a resistance of the resistor 4 is R2, and the current flowing through the MR element 1 is I, then V.sub.B =Vcc-Ir.times.R2, V.sub.A =Vcc-I.times.R1. As a result, I.times.R1=Ir.times.R2 is obtained if V.sub.A =V.sub.B. Therefore, the current I flowing through the MR element 1 is I=Ir.times.(R2/R1). If R2=R1, the current I is constantly equal to Ir. In other words, in the case where resistance of the resistor 3 is equal to the resistance of the resistor 4, the loop amplifier 6 gives a feedback current to the transistor 2 so that the current Ir is equal to the current I flowing through the MR element. In the case the where the potential V.sub.A at a node n1 (+terminal) is equal to or smaller than the potential V.sub.B at a node n2 (-terminal) of the loop amplifier 6, the loop amplifier 6 does not supply a base current to the transistor 2.
When the state of the loop amplifier changes from the stable state to a state in which the potential V.sub.A at the node n1 (+terminal) is larger than the potential V.sub.B at the node n2 (-terminal) of the loop amplifier 6, the loop amplifier 6 supplies the current to the transistor 2, which charges the capacitor 9 to decrease the potential V.sub.A. In this way, the potential V.sub.A is kept at a constant value, therefore, the current flowing through the MR element 1 is constant. Alternatively, a capacitance C.sub.0 of the capacitor 9 used for setting a time constant of the loop has a large capacitance value such that the loop current can not respond to the frequency of the data signal.
FIGS. 11A-11D show timing charts of the conventional MR head amplifier. The first switch 10 is controlled to be ON during the read-state of reading the data, while controlled to be OFF during the write-state of writing the data as shown in FIG. 11B. In the conventional MR head amplifier, since a large current flows through the MR head during writing the data, the writing signal affects the current flowing through the MR element 1. As a result, since a writing current .DELTA.I is superposed on the current I flowing through the MR element 1, the current flowing through the resistor 3 changes which changes the voltage drop of the resistor 3. The potential V.sub.A of the node n1 decreases if the writing current .DELTA.I has a positive value, while it increases if the writing current .DELTA.I has a negative value. Therefore, the potential at the bias point (node n1) of the read amplifier 6 drifts according to the current I influenced by the writing current .DELTA.I. In order to solve this problem, the switch 10 is turned OFF during writing in order to prevent the loop amplifier 6 from holding the potential of the capacitor 9 constant.
FIG. 12 shows a loop amplifier 6 shown in FIG. 10. In FIG. 12, the loop amplifier 6 comprises transistors 21, 22, transistors 23, 24, and transistors 28, 29 which, respectively, constitute current mirror circuits, transistors 25, 26 constituting a differential amplifier, a constant current source 27, an inverted input terminal IN.sup.-, a non-inverted input terminal IN.sup.+, and an output terminal OUT. As shown in FIG. 10, the non-inverted input terminal IN.sup.+ is connected to the node n1, and the inverted input terminal IN.sup.- is connected to the node n2. In the case where a current I of the transistor 2 in FIG. 10 decreases by a noise inputted into the MR element 1, the potential V.sub.A at the node n1 increases. This potential increase at the node n1 causes a base potential of the transistor 26 in FIG. 12 to increase. As a result, a current of the transistor 26 increases by .DELTA.I which also increases a current of the transistor 23 by .DELTA.I. Since the transistor 2 and the transistor 24 are coupled by a current mirror connection, the current in the transistor 24 also increases by .DELTA.I. The current increase of .DELTA.I is outputted from the output terminal OUT of the loop amplifier 6 and supplied to a base of the transistor 2. Therefore, the current of the transistor 2 in FIG. 10 increases, which also causes the current through the resistor 3 to increase, and therefore the potential of the node n1 decreases. In this way, the potential V.sub.A at the node n1 returns to the earlier potential value.
As described above, the potential at the bias point of the read amplifier does not change if the noise signal from the write-head enters into the MR head during writing. However, since the capacitor 9 is directly connected to the base of the transistor 2, the capacitor 9 discharges its potential under the influence of the base current of the transistor 2 when the MR head amplifier is writing the data as shown in FIG. 11C. As a result, the potential at the node n1 decreases. When MR head amplifier changes to the read-state and the switch 10 is turned ON, the current of the transistor 2 suddenly decreases since the low potential is supplied to the base of the transistor 2. As a result, there is a problem that the potential V.sub.A at the node n1 increases suddenly and the sag is generated between the signal outputs OUT A and OUT B as shown in FIG. 11D.